1. Field of the Invention
The invention disclosed herein relates generally to the circuit design and configuration of semiconductor power devices such as MOSFET based devices. More particularly, this invention relates to a novel and improved circuit configuration designs and manufacturing methods to reduce the ringing of a semiconductor power device that implemented either as synchronous converter or as a switching circuit.
2. Description of the Prior Art
Conventional power MOSFET devices still face a ringing oscillation difficulty that may lead to the problems of shooting through. The ringing oscillations and shooting through problems cause excessive dissipation and efficiency loss. More particularly, in a switching circuit, such as a synchronous buck converter, half bridge converters or inverters, two power MOSFETs are switched in complimentary fashion. Two MOSFETs are connected in series and across a voltage source are generally referred to as high side and low side (LS) MOSFETs. The low side MOSFET is first turned off to initiate a switching cycle. Turning off the low side MOSFET forces the body diode of the low side MOSFET to turn on to take over the current. After a delay, the high side MOSFET is turned on thus forces the body diode of the low side MOSFET to turn off. However, the turning off action of the body diode of the low side MOSFET results in an abrupt termination of the recovery current. In the meanwhile, the recovery current also flows through the parasitic inductances of the MOSFETs and the trace inductances of the switching circuit. An abrupt termination of the recovery current thus leads to severe oscillation in the switching circuit that is commonly known as the ringing in the switching circuit. These ringing oscillations may result in an unintentional turning on of the low side MOSFET. This unintentional and undesirable turning on of the low side MOSFET is commonly referred to as a shooting through effect. Many studies have been conducted into the ringing phenomenon in order to minimize its adverse effects.
Referring to FIG. 1A for a typical circuit diagram of a conventional buck converter 10 that includes a high side MOSFET 15 and a low side MOSFET 20 serially connected between an input terminal 25 having an input voltage represented by Vin and a ground terminal 30. The drain of the low side MOSFET 20 is connected to the source of the high side MOSFET 15 at a mid point 35 connecting to the load 40 through inductance L and capacitance C. When the buck converter 10 operates at high speed, a shoot through condition becomes a problem when both the high side and low side MOSFET are turned on at the same time causing a shoot through current to flow between the input terminal 25 and the ground terminal 30. The shoot through condition results in excessive dissipation and efficiency loss. In order to avoid the shoot through problem, a controlling circuit 45 is implemented to control the gate signals to generate a dead time between the gate signals for the high side and low side MOSFET. FIG. 1B shows such a dead time between the time when the high side MOSFET 15 is turned off and the time when the low side MOSFET 20 is turned on such that the high side and low side MOSFETs are prevented from turning on simultaneously.
However, such control circuits as shown still cannot effectively prevent the ringing oscillation as shown in FIG. 1C. As shown in FIG. 1C, the circuit inductances are high. Therefore, it is possible for the ringing oscillations to present during the entire ON period of the high side FET. Such excessive ringing oscillations may likely couple to the DC output of the converter and cause the sensitive load circuits to malfunction.
Several studies and analyses have been conducted on this problem of ringing oscillations. Peter Markowski published in a website under the world wide web name of planetanalog.com an article on “estimating MOSFET switching losses means higher performance buck converters” wherein the article ID is 12802296. G Nobauer et al. describes “A method to determine parasitic inductances in Buck Converter topologies” in Infineon Application Note June 2004. APEC 2005 published another article by Qun Zhao et al. entitled “Characterization of Cdv/dt induced power loss in synchronous Buck DC-DC converters”. APEC 2005 also published another article by Bo Yang et a. entitled “Effect and Utilization of Common Source Inductance in Synchronous Rectification”. Steve Mappus discloses techniques to resolve the ringing oscillations in “DV/DT immunity improved in synchronous buck converters” Most of these publications are analytical in nature and concentrate on the analyses of the effect of parasitic package inductance and capacitances on the amount of ringing. It is concluded that the package inductances significantly add to the ringing and shoot through problems and should be kept to the minimum. However these publications have not offered solutions to the problems caused by trace inductances outside the package arising from poor layout practices. The article by Steve Mappus recommends a negative bias to the LS FET gate drive in addition to other recommendations. However these involve trade offs with other switching and conduction losses and also need more complex gate drive circuitry to generate the negative bias.
Therefore, a need still exists in the art to provide an improved circuit configuration and to provide semiconductor power device based switching devices with reduced ringing for preventing unintentional shooting through problems such that the above-discussed technical difficulties can be resolved. It is further desirable that the solution offered should effectively reduce ringing caused by the circuit inductances outside the semiconductor power device packaging. Furthermore, it is desirable that the circuit configuration is compatible and can work with any standard gate driver circuit commonly used in the art.